The authors proposed a pipelined multiprocessor system-on-a-chip (PMPSoC) design flow for the rapid prototyping of a streaming multimedia processing system. The PMPSoC design flow consists of a modular design of algorithm, data arrangement, pipelined controller design, hardware/software (HW/SW) co-simulation and HW/SW co-synthesis. The streaming data processing system can be divided into several individual and independent modules. Each independent module function is completed by an embedded processor by software. Applying the pipelining technology synthesizes the hardware of the main controller to integrate all modules and increase the total system performance. A simulator of a pipelined multiprocessor system was completed. The advantages of the proposed design methodology are: the simulation level is increasing from register transfer level (RTL) to transaction level model (TLM). It can reduce the time of system verification immensely. Additionally, after the system architecture is decided, the simulator can produce a simulation platform of a pipelined multiprocessor system automatically. The accuracy of the multiprocessor system function can be verified before the accomplishment of a system hardware circuit to reach the purpose of a rapid prototype. The authors also completed the corresponding of TLM’s pipelined controller and processor’s RTL circuit. When the system TLM verification is finished, the hardware circuit is also synthesized. The PMPSoC design flow was applied to design the system-on-a-chip for fingerprint person authentication application. In the same frequency of a system clock, the computational performance of fingerprint recognition on the PMPSoC is increasing 430.7% more than on a processor. The memory can be reduced 32.53%. It has the characteristic of low power consumption. The experimental result shows that the PMPSoC design methodology has high application value.